Cpu Special-Function Registers (Sfrs); Windowing - Intel 8XC196K Series User Manual

Table of Contents

The following example initializes the top of the upper register file (8XC196CA, JT, JV, KS, KT)

as the stack. (For the 8XC196JR or KR, the immediate value would be #200H; for the 8XC196JQ

or KQ, it would be #180H.)

The following example shows how to allow the linker locator to determine where the stack fits

in the memory map that you specify.

CPU Special-function Registers (SFRs)

Locations 0000–0017H in the lower register file are the CPU SFRs (Table 4-7). Appendix C de-

scribes the CPU SFRs.

Using any SFR as a base or index register for indirect or indexed operations

can cause unpredictable results. External events can change the contents of

SFRs, and some SFRs are cleared when read. For this reason, consider the

implications of using an SFR as an operand in a read-modify-write instruction

(e.g., XORB).

Windowing expands the amount of memory that is accessible with register-direct addressing.

tions. With windowing, register-direct addressing can also access the upper register file and pe-

ripheral SFRs.

;Load stack pointer

Table 4-7. CPU SFRs

High (Odd) Byte

ONES_REG (H)

ZERO_REG (H)

MEMORY PARTITIONS

Low (Even) Byte

ONES_REG (L)

ZERO_REG (L)