Intel 8XC196K Series User Manual page 84

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Table 4-8 on page 4-16 provides a quick reference of WSR values for windowing the peripheral
SFRs. Table 4-9 on page 4-16 lists the WSR values for windowing the upper register file. Table
4-9 on page 4-16 lists the WSR values for windowing the additional register RAM of the
8XC196JV.
WSR
The window selection register (WSR) has two functions. One bit enables and disables the bus-hold
protocol. The remaining bits select windows. Windows map sections of RAM into the upper section of
the lower register file, in 32-, 64-, or 128-byte increments. PUSHA saves this register on the stack and
POPA restores it.
7
CA, J x
7
K x
HLDEN
Bit
Bit
Number
Mnemonic
7
HLDEN
6:0
W6:0
On the 8XC196CA, J x devices this bit is reserved; always write as zero.
W6
W5
W6
W5
Hold Enable
This bit enables and disables the bus-hold protocol (see Chapter 15,
"Interfacing with External Memory"). It has no effect on windowing.
1 = bus-hold protocol enabled
0 = bus-hold protocol disabled
Window Selection
These bits specify the window size and window number:
6 5 4 3 2 1 0
1 x x x x x x 32-byte window; W5:0 = window number
0 1 x x x x x 64-byte window; W4:0 = window number
0 0 1 x x x x 128-byte window; W3:0 = window number
Figure 4-3. Window Selection Register (WSR)
MEMORY PARTITIONS
Reset State:
W4
W3
W2
W4
W3
W2
Function
Address:
14H
00H
0
W1
W0
0
W1
W0
4-15

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