Intel 8XC196K Series User Manual page 100

Table of Contents

Table 5-3. Interrupt Sources, Vectors, and Priorities

Interrupt Source

Nonmaskable Interrupt

Reserved (K x , J x )

SIO Transmit

SSIO Channel 1 Transfer

SSIO Channel 0 Transfer

Slave Port Command Buff Full CBF

Unimplemented Opcode

Software TRAP Instruction

Slave Port Input Buff Full

Slave Port Output Buff Empty

A/D Conversion Complete

EPA Capture/Compare 0

EPA Capture/Compare 1

EPA Capture/Compare 2

EPA Capture/Compare 3

EPA Capture/Compare 4–9,

EPA 0–9 Overrun,

EPA Compare 0–1,

Timer 1 Overflow,

Timer 2 Overflow

The NMI pin is not bonded out on the 8XC196J x. To protect against glitches, create a dummy interrupt

service routine that contains a RET instruction.

The PTS cannot determine the source of multiplexed interrupts, so do not use it to service these

interrupts when more than one multiplexed interrupt is unmasked.

All CAN-controller interrupts are multiplexed into the single CAN interrupt input (INT13). The interrupt

service routine associated with INT13 must read the CAN interrupt pending register (CAN_INT) to

determine the source of the interrupt request

These interrupts are individually prioritized in the EPAIPV register (see Table 10-16 on page 10-30).

Read the EPA pending registers (EPA_PEND and EPA_PEND1) to determine which source caused the

Interrupt Controller

STANDARD AND PTS INTERRUPTS