Intel 8XC196K Series User Manual page 442

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Opcode
x8
SHR
0x
SHRB
1x
2x
3x
bit 0
4x
di
5x
di
6x
di
7x
di
8x
di
9x
di
Ax
di
Bx
di
Cx
di
JST
Dx
Ex
(Note 1)
(Note 1)
CLRC
Fx
NOTES:
1.
For the 8XC196KS and KT only, this opcode is reserved, but it does not generate an unimplemented
opcode interrupt.
2.
Signed multiplication and division are two-byte instructions. The first byte is "FE" and the second is the
opcode of the corresponding unsigned instruction.
Table A-1. Opcode Map (Right Half)
x9
xA
SHL
SHRA
XCH
SHLB
SHRAB
XCHB
bit 1
bit 2
bit 3
SUB 3op
im
in
SUBB 3op
im
in
SUB 2op
im
in
SUBB 2op
im
in
CMP
im
in
CMPB
im
in
SUBC
im
in
SUBCB
im
in
PUSH
im
in
JH
JLE
(Note 1)
(Note 1)
SETC
DI
INSTRUCTION SET REFERENCE
xB
xC
xD
SHRL
SHLL
ix
(Note 1)
(Note 1)
ix
SCALL
JBS
bit 4
bit 5
MULU 3op (Note 2)
ix
di
im
MULUB 3op (Note 2)
ix
di
im
MULU 2op (Note 2)
ix
di
im
MULUB 2op (Note 2)
ix
di
im
DIVU (Note 2)
ix
di
im
DIVUB (Note 2)
ix
di
im
ix
di
im
ix
di
im
POP
BMOVI
ix
di
JC
JVT
JV
DPTS
(Note 1)
EI
CLRVT
NOP
xE
xF
SHRAL
NORML
(Note 1)
(Note 1)
bit 6
bit 7
in
ix
in
ix
in
ix
in
ix
in
ix
in
ix
LDBZE
in
ix
LDBSE
in
ix
POP
in
ix
JLT
JE
(Note 1)
LCALL
signed
RST
MUL/DIV
(Note 2)
A-3

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