Intel 8XC196K Series User Manual page 597

8XC196K x, J x , CA USER'S MANUAL
SP_STATUS
SP_STATUS
The serial port status (SP_STATUS) register contains bits that indicate the status of the serial port.
7
RPE/RB8 RI
Bit Bit
Number Mnemonic
7 RPE/RB8
6 RI
5 TI
4 FE
3 TXE
2 OE
1:0 —
C-70
TI FE
Received Parity Error/Received Bit 8
RPE is set if parity is disabled (SP_CON.2=0) and the ninth data bit
received is high.
RB8 is set if parity is enabled (SP_CON.2=1) and a parity error occurred.
Reading SP_STATUS clears this bit.
Receive Interrupt
This bit is set when the last data bit is sampled. Reading SP_STATUS
clears this bit.
This bit need not be clear for the serial port to receive data.
Transmit Interrupt
This bit is set at the beginning of the stop bit transmission. Reading
SP_STATUS clears this bit.
Framing Error
This bit is set if a stop bit is not found within the appropriate period of
time. Reading SP_STATUS clears this bit.
SBUF_TX Empty
This bit is set if the transmit buffer is empty and ready to accept up to two
bytes. It is cleared when a byte is written to SBUF_TX.
Overrun Error
This bit is set if data in the receive shift register is loaded into SBUF_RX
before the previous bit is read. Reading SP_STATUS clears this bit.
Reserved. These bits are undefined.
Address:
Reset State:
TXE OE
Function
1FB9H
0BH
0
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