Figure 15.14 Data Stage Operation (Control-Out) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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(3) Data Stage (Control-Out)
The firmware first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is
out-transfer, the application waits for data from the host, and after data is received (EP0oTS of
UIFR0 is set to 1), reads data from the FIFO. Next, the firmware writes 1 to the EP0o read
complete bit, empties the receive FIFO, and waits for reception of the next data.
The end of the data stage is identified when the host transmits an IN token and the status stage
is entered.
USB function
OUT token reception
to UTRG0/EP0s
Data reception from host
Set EP0o reception
complete flag
(UIFR0/EP0o TS = 1)
OUT token reception
to UTRG0/EP0o
Rev. 3.0, 10/02, page 496 of 686
1 written
No
RDFN?
NACK
Yes
ACK
1 written
No
RDFN?
NACK
Yes

Figure 15.14 Data Stage Operation (Control-Out)

Firmware
Clear EP0o reception
complete flag
(UIFR0/EP0o TS = 0)
Read data from USB endpoint
receive data size register 0o
(UESZ0o)
Read data from USB endpoint
data register 0o (UEDR0o)
Write 1 to EP0o read
complete bit
(UTRG0/EP0o RDFN = 1)

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