Flash Memory Emulation In Ram; Figure 19.10 Example Of Ram Overlap Operation - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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3. The overlapped RAM area can be accessed from both the flash memory addresses and RAM
addresses.
4. When the RAMS bit in RAMER is set to 1, program/erase protection is enabled for all flash
memory blocks (emulation protection). In this state, setting the P1 or E1 bit in FLMCR1 to 1
does not cause a transition to program mode or erase mode.
5. A RAM area cannot be erased by execution of software in accordance with the erase algorithm.
6. Block area EB0 contains the vector table. When performing RAM emulation, the vector table
is needed in the overlap RAM.
H'000000
H'001000
H'002000
H'002FFF
H'FFB000
H'FFD000
H'FFDFFF
H'FFE000
H'FFEFBF
H'FFFFC0
H'FFFFFF
Rev. 3.0, 10/02, page 582 of 686
Flash memory
(EB0)
(EB1)
(EB2)
On-chip RAM
(8 kbytes)
On-chip RAM
(4 kbytes)
On-chip RAM
(4 k to 64 kbytes)
On-chip RAM (64 kbytes)
Normal memory map

Figure 19.10 Example of RAM Overlap Operation

Flash memory
(EB0)
On-chip RAM
(4-kbyte shadow)
Flash memory
(EB2)
On-chip RAM
(8 kbytes)
On-chip RAM
(4 kbytes)
On-chip RAM
(4 k to 64 kbytes)
On-chip RAM (64 kbytes)
RAM overlap memory map

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