Figure 6.14 Bus Timing For 16-Bit 2-State Access Space (2) (Odd Address Byte Access) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
Table of Contents

Advertisement

Read
Write
Note: n = 0 to 7

Figure 6.14 Bus Timing for 16-Bit 2-State Access Space (2) (Odd Address Byte Access)

φ
Address bus
D15 to D8
D7 to D0
D15 to D8
D7 to D0
Bus cycle
T
T
1
2
Invalid
Valid
High
High impedance
Valid
Rev. 3.0, 10/02, page 123 of 686

Advertisement

Table of Contents
loading

Table of Contents