Figure 6.17 Bus Timing For 16-Bit 3-State Access Space (2) (Odd Address Byte Access) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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Read
Write
Note: n = 0 to 7

Figure 6.17 Bus Timing for 16-Bit 3-State Access Space (2) (Odd Address Byte Access)

Rev. 3.0, 10/02, page 126 of 686
φ
Address bus
D15 to D8
D7 to D0
D15 to D8
D7 to D0
Bus cycle
T
T
1
2
High
High impedance
Valid
T
3
Invalid
Valid

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