Scan Mode; Figure 16.3 A/D Conversion Timing (Single-Chip Mode, Channel 1 Selected) - Hitachi H8S/2215 Series Hardware Manual

ADIE
ADST
ADF
State of channel 0 (AN0)
State of channel 1 (AN1)
State of channel 2 (AN2)
State of channel 3 (AN3)
ADDRA
ADDRB
ADDRC
ADDRD
Note: * Vertical arrows ( ) indicate instructions executed by software.

Figure 16.3 A/D Conversion Timing (Single-Chip Mode, Channel 1 Selected)

16.5.2

Scan Mode

In scan mode, A/D conversion is to be performed sequentially on the specified channels (four
channels maximum). The operations are as follows.
1. When the ADST bit is set to 1 by software, TPU or external trigger input, A/D conversion
starts on the first channel in the group (AN0 when CH3 and CH2 = 00, AN4 when CH3 and
CH2 = 01, or AN8 when CH3 and CH2 = 10).
2. When A/D conversion for each channel is completed, the result is sequentially transferred to
the A/D data register corresponding to each channel.
3. When conversion of all the selected channels is completed, the ADF flag is set to 1. If the
ADIE bit is set to 1 at this time, an ADI interrupt is requested after A/D conversion ends.
Conversion of the first channel in the group starts again.
4. Steps [2] to [3] are repeated as long as the ADST bit remains set to 1. When the ADST bit is
cleared to 0, A/D conversion stops.
Set*
A/D
Set*
conversion
starts
Idle
Idle
A/D conversion 1
Idle
Idle
Set*
Clear*
Idle 2
A/D conversion
Read conversion result
A/D conversion result 1
Rev. 3.0, 10/02, page 541 of 686
Clear*
Idle
Read conversion result
A/D conversion result 2