Figure 24.8 Basic Bus Timing (Three-State Access) - Hitachi H8S/2215 Series Hardware Manual

ø
A23 to A0
to
(read)
D15 to D0
(read)
,
(write)
D15 to D0
(write)
Rev. 3.0, 10/02, page 660 of 686
T1
t
AD
t
AS
t
CSD
t
ASD
t
RSD1
t
AS
t t
WDD WDS

Figure 24.8 Basic Bus Timing (Three-State Access)

T2
t
ASD
t
ACC4
t
ACC5
t
WRD1
t
WSW2
T3
t
AH
t
RSD2
t
t
RDS
RDH
t
WRD2
t
AH
t
WDH