Hitachi H8S/2215 Series Hardware Manual page 22

Section
15.9.8 Reset
16.3.3 A/D Control
Register (ADCR)
18. RAM
Rev. 3.0, 10/02, page xxii of lviii
Page
Description
Explanation amended to 2nd line changed as follows
529
A manual reset should not be performed during USB
communication as the LSI will stop with the USD+USD- pin
state maintained.This USB module uses synchronous reset
for some registers. The reset state of these registers must be
cancelled after the clock oscillation stabilization time has
passed. At initialization, reset must be cancelled using the
following procedure.
Table amended
538
Bit Bit Name Initial Value
5 — 1
4 — 1
3 CKS1 0
2 CKS0 0
1 — 1
0 — 1
555
Lineup added
Product Class
H8S/2215 HD64F2215
series
HD64F2215U
HD6432215A
HD6432215B
HD6432215C
R/W Description
— Reserved
— These bits are always read as 1 cannot be modified.
R/W Clock Select 0 and 1
R/W These bits specify the A/D conversion time. The
conversion time should be changed only when ADST =
0. Specify a setting that gives a value within the range
shown in table 24.7.
00: Conversion time = 530 states (max.)
01: Conversion time = 266 states (max.)
10: Conversion time = 134 states (max.)
11: Conversion time = 68 states (max.)
The conversion time setting should exceed the
conversion time shown in section 24.6, A/D Converter
Characteristics.
— Reserved
— These bits are always read as 1 cannot be modified.
ROM Type RAM Size
Flash memory Version 16 kbytes
Masked ROM Version
8 kbytes
RAM Address
H'FFB000 to H'FFEFBF
H'FFFFC0 to H'FFFFFF
H'FFD000 to H'FFEFBF
H'FFFFC0 to H'FFFFFF