Hitachi H8S/2215 Series Hardware Manual page 50

Hitachi single-chip microcomputer
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Figure 15.12 Setup Stage Operation ........................................................................................... 493
Figure 15.13 Data Stage Operation (Control-In)......................................................................... 495
Figure 15.14 Data Stage Operation (Control-Out) ...................................................................... 496
Figure 15.15 Status Stage Operation (Control-In) ...................................................................... 497
Figure 15.16 Status Stage Operation (Control-Out).................................................................... 498
Figure 15.17 EP1i Interrupt-In Transfer Operation..................................................................... 499
Figure 15.18 EP2i Bulk-In Transfer Operation........................................................................... 501
Figure 15.19 EP2o Bulk-In Transfer Operation.......................................................................... 503
Figure 15.20 EP3i Isochronous-In Transfer Operation ............................................................... 505
Figure 15.21 EP3o Isochronous-Out Transfer Operation............................................................ 507
Figure 15.22 Forcible Stall by Firmware .................................................................................... 510
Figure 15.23 Automatic Stall by USB Function Module ............................................................ 512
Figure 15.24 EP2iPKTE Operation in UTRG0........................................................................... 514
Figure 15.25 EP2oRDFN Operation in UTRG0 ......................................................................... 515
Figure 15.26 Endpoint Configuration Example .......................................................................... 516
(When On-Chip Transceiver is Used).................................................................... 521
(When On-Chip Transceiver is Used).................................................................... 522
(When External Transceiver is Used) .................................................................... 523
(When External Transceiver is Used) .................................................................... 524
Figure 15.31 10-Byte Data Reception......................................................................................... 527
Figure 15.32 EP3o Data Reception ............................................................................................. 528
Figure 15.33 Transition to and from Software Standby Mode.................................................... 531
Figure 15.34 USB Software Standby Mode Transition Timing.................................................. 532
Section 16 A/D Converter
Figure 16.1 Block Diagram of A/D Converter............................................................................ 534
Figure 16.2 Access to ADDR (When Reading H'AA40) ........................................................... 539
Figure 16.5 A/D Conversion Timing .......................................................................................... 543
Figure 16.6 External Trigger Input Timing................................................................................. 544
Figure 16.7 A/D Conversion Precision Definitions (1)............................................................... 546
Figure 16.8 A/D Conversion Precision Definitions (2)............................................................... 546
Figure 16.9 Example of Analog Input Circuit ............................................................................ 547
Figure 16.10 Example of Analog Input Protection Circuit ........................................................... 549
Figure 16.11 Analog Input Pin Equivalent Circuit ....................................................................... 549
Section 17 D/A Converter
Figure 17.1 Block Diagram of D/A Converter............................................................................ 551
Figure 17.2 Example of D/A Converter Operation ..................................................................... 554
Rev. 3.0, 10/02, page l of lviii

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