Figure 2.3 Exception Vector Table (Advanced Mode) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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• Exception Vector Table and Memory Indirect Branch Addresses
In advanced mode the top area starting at H'00000000 is allocated to the exception vector table
in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch address is stored in
the lower 24 bits (figure 2.3). For details of the exception vector table, see section 4, Exception
Handling.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010

Figure 2.3 Exception Vector Table (Advanced Mode)

The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions
uses an 8-bit absolute address included in the instruction code to specify a memory operand
that contains a branch address. In advanced mode the operand is a 32-bit longword operand,
providing a 32-bit branch address. The upper 8 bits of these 32 bits are a reserved area that is
regarded as H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF.
Note that the first part of this range is also the exception vector table.
• Stack Structure
In advanced mode, when the program counter (PC) is pushed onto the stack in a subroutine
call, and the PC, condition-code register (CCR), and extended control register (EXR) are
pushed onto the stack in exception handling, they are stored as shown in figure 2.4. When EXR
is invalid, it is not pushed onto the stack. For details, see section 4, Exception Handling.
Rev. 3.0, 10/02, page 24 of 686
Reserved
Reset exception vector
Reserved
(Reserved for system use)
(Reserved for system use)
Reserved
Exception vector 1
Exception vector table

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