Figure 10.14 Example Of Synchronous Operation Setting Procedure - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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Synchronous operation
selection
Set synchronous
operation
Synchronous presetting
Set TCNT
<Synchronous presetting>
[1]
Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
operation.
[2]
When the TCNT counter of any of the channels designated for synchronous operation is
written to, the same value is simultaneously written to the other TCNT counters.
[3]
Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare,
etc.
[4]
Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing
source.
[5]
Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.

Figure 10.14 Example of Synchronous Operation Setting Procedure

Example of Synchronous Operation: Figure 10.15 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and synchronous
clearing has been set for the channel 1 and 2 counter clearing sources. Three-phase PWM
waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this time, synchronous
presetting, and synchronous clearing by TGRB_0 compare match, is performed for channel 0 to 2
TCNT counters, and the data set in TGRB_0 is used as the PWM cycle. For details of PWM
modes, see section 10.5.4, PWM Modes.
Rev. 3.0, 10/02, page 298 of 686
[1]
Synchronous clearing
[2]
Clearing
source generation
channel?
Yes
Select counter
clearing source
Start count
<Counter clearing>
No
Set synchronous
[3]
counter clearing
[4]
Start count
<Synchronous clearing>
[4]
[5]

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