Figure 15.1 Block Diagram Of Usb - Hitachi H8S/2215 Series Hardware Manual

[Interrupt request signal]
,
[DMA internal request signal]
,
[Internal bus]
Peripheral data bus
Peripheral address bus
Peripheral bus control
signal
[System clock]
φ
(16MHz)
[USB operating clock]
EXTAL48
XTAL48
Legend:
UDC: USB Device Controller
EP0s: Endpoint 0 setup FIFO
EP0i to 5i: Endpoint 0 to 5 In FIFO
EP0o to 4o: Endpoint 0 to 4 Out FIFO
USB
1288-byte FIFO
EP0s
EP0i
EP0o
EP1i
Registers
Interface
UDC synchronization
circuit
(12MHz)
PLL
(48MHz)
curcuit
(×3)
UDC core
USB
clock
generator (48MHz)

Figure 15.1 Block Diagram of USB

EP2i EP4i
EP2o EP4o
EP3i EP5i
EP3o
Internal
transceiver
Rev. 3.0, 10/02, page 435 of 686
[Power mode selection]
[Connection/disconnection]
VBUS
[Suspend]
USPND
[Power supply]
DrVcc
DrVss
[Data]
Rs
USD+ D+
Rs
USD- D-
[External transceiver connection]
RCV
VP
VM
VPO
FSE0
SUSPEND