Table of Contents
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16-Bit Timer Pulse Unit.......................... 263
Buffer Operation ................................. 299
Free-running count operation.............. 293
Input Capture Function ....................... 296
periodic count operation ..................... 293
Phase Counting Mode......................... 305
PWM Modes....................................... 302
Synchronous Operation....................... 297
toggle output ....................................... 295
Waveform Output by Compare Match 294
8-Bit Timers............................................ 327
16-Bit Counter Mode .......................... 339
Cascaded Connection.......................... 339
Compare Match Count Mode.............. 339
Pulse Output........................................ 334
TCNT Incrementation Timing ............ 335
Toggle output...................................... 344
A/D Converter ........................................ 533
A/D Conversion Time......................... 542
A/D Converter Activation................... 312
External Trigger.................................. 544
Scan Mode .......................................... 541
Single Mode........................................ 540
Address Space........................................... 26
Addressing Mode...................................... 46
Absolute Address.................................. 47
Immediate ............................................. 48
Memory Indirect ................................... 48
Program-Counter Relative .................... 48
Register Direct ...................................... 47
Register Indirect.................................... 47
Register Indirect with Displacement..... 47
Register Indirect with Post-Increment .. 47
Register indirect with pre-decrement.... 47
Bcc...................................................... 35, 43
Boundary Scan........................................ 417
Index
Bus Arbitration........................................138
bus cycle..................................................116
Clock Pulse Generator ............................595
Condition Field .........................................45
Condition-Code Register...........................30
CPU Operating Modes ..............................22
Advanced Mode ....................................23
Normal Mode ........................................22
Data Direction Register...........................238
Data Register...........................................238
Data Transfer Controller .........................195
Activation by Software .......................214
Block Transfer Mode ..........................209
Chain Transfer.....................................210
DTC Vector Table...............................202
Normal Mode .............................. 206, 215
Register Information ...........................202
Repeat Mode .......................................208
Software Activation ............................215
vector number for DTC software
activation.............................................200
Effective Address.......................... 46, 49, 50
Effective Address Extension .....................45
Exception Handling
Interrupts ...............................................70
Reset Exception Handling.....................68
Stack Status ...........................................72
Traces....................................................70
Trap Instruction.....................................71
Extended Control Register ........................29
Flash Memory .........................................557
Boot Mode ..........................................571
Emulation ............................................581
Erase/Erase-Verify ..............................585
erasing units ........................................563
Error Protection...................................587
Rev. 3.0, 10/02, Page 683 of 686
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