Hitachi H8S/2215 Series Hardware Manual page 505

Bit Bit Name Initial Value R/W
5 UCKS3 0
4 UCKS2 0
3 UCKS1 0
2 UCKS0 0
1 UIFRST 1
Description
R/W 1001: Reserved
R/W 1010: Reserved
R/W 1011: Reserved
R/W 1100: Uses the USB operating clock (48 MHz) directly.
The PLL stops. The USB operating clock stabilization
time is 8 ms.
1101: Reserved
1110: Reserved
1111: Reserved
Note that the USB operating clock stabilization time
differs according to the selected clock source and is
automatically counted by the system clock. The USB
operating clock stabilization time shown above is for
the case when the 16-MHz system clock is used.
R/W USB Interface Software Reset
Controls USB module internal reset. When the
UIFRST bit is set to 1, the USB internal modules other
than UCTLR, UIER3, and the CK48 READY bit of
UIFR3 are all reset. At initialization, the UIFRST bit
must be cleared to 0 after the USB operating clock
stabilization time has passed following USB module
stop mode cancellation.
0: Sets the USB internal modules to the operating
state (at initialization, this bit must be cleared after the
USB operating clock stabilization time has passed).
1: Sets the USB internal modules other than UCTLR,
UIER3, and the CK48 READY bit of UIFR3 reset state.
If the UIFRST bit is set to 1 after it is cleared to 0, the
UDCRST bit is also set to 1 simultaneously.
Rev. 3.0, 10/02, page 447 of 686