Hitachi H8S/2215 Series Hardware Manual page 345

Bit Bit Name Initial value
3 TGFD 0
2 TGFC 0
R/W Description
R/(W) Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channel 0. The write value
should always be 0 to clear this flag. In channels 1 and 2,
bit 3 is reserved. It is always read as 0 and cannot be
modified.
[Setting conditions]
· When TCNT = TGRD while TGRD is functioning as
output compare register
· When TCNT value is transferred to TGRD by input
capture signal while TGRD is functioning as input
capture register
[Clearing condition]
· When DTC is activated by TGID interrupt while DISEL
bit or MRB in DTC is 0
· When 0 is written to TGFD after reading TGFD = 1
R/(W) Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channel 0. The write value
should always be 0 to clear this flag. In channels 1 and 2,
bit 2 is reserved. It is always read as 0 and cannot be
modified.
[Setting condition]
· When the TCNT = TGRC while TGRC is functioning as
output compare register
· When TCNT value is transferred to TGRC by input
capture signal while TGRC is functioning as input
capture register
[Clearing condition]
· When DTC is activated by TGIC interrupt while DISEL
bit or MRB in DTC is 0
· When 0 is written to TGFC after reading TGFC = 1
Rev. 3.0, 10/02, page 287 of 686