Hitachi H8S/2215 Series Hardware Manual page 18

Section
15.3.23 USB Endpoint
Receive Data Size
Register 2o (UESZ2o)
15.3.24 USB Endpoint
Receive Data Size
Register 3o (UESZ3o)
15.3.25 USB Endpoint
Receive Data Size
Register 4o (UESZ4o)
15.3.30 USB Interrupt
Enable Register 0 (UIER0)
15.3.34 USB Interrupt
Select Register 0 (UISR0)
Rev. 3.0, 10/02, page xviii of lviii
Page
Description
2nd line changed as follows
461
(Incorrect) Endpoint2
(Correct) Endpoint2o
4th line changed as follows
(Incorrect) The FIFO for endpoint 2 out transfer has a dual-
FIFO configuration
(Correct) The FIFO for endpoint 2o (for Bulk_out transfer) has
a dual-FIFO configuration
th
7 line changed as follows
(Incorrect) Endpoint3
(Correct) Endpoint3o
th
9 line changed as follows
(Incorrect) The FIFO for endpoint 3 out transfer has a dual-
FIFO configuration.
(Correct) The FIFO for endpoint 3o (for Isochronous_out
transfer) has a dual-FIFO configuration.
th
12 line changed as follows
(Incorrect) Endpoint4
(Correct) Endpoint4o
th
14 line changed as follows
(Incorrect) The FIFO for endpoint 4 out transfer has a dual-
FIFO configuration.
(Correct) The FIFO for endpoint 4o (for Bulk_out transfer) has
a dual-FIFO configuration.
Bit table amended
470
Bit Bit Name
7 BRSTE
6 —
5 EP1iTRE
4 EP1iTSE
Bit table amended
472
Bit Bit Name
7 BRSTS
6 —
5 EP1iTRS
4 EP1iTSS
3 EP0oTSS
2 EP0iTRS
1 EP0iTSS
0 SetupTSS
Initial Value R/W Description
0 R/W Enables the BRST interrupt.
0 R Reserved
This bit is always read as 0.
0 R/W Enables the EP1iTR interrupt.
0 R/W Enables the EP1iTS interrupt.
Initial Value R/W Description
0 R/W Selects the BRST interrupt output pin.
0 R Reserved
This bit is always read as 0.
0 R/W Selects the EP1iTR interrupt output pin.
0 R/W Selects the EP1iTS interrupt output pin.
0 R/W Selects the EP0oTS interrupt output pin.
0 R/W Selects the EP0iTR interrupt output pin.
0 R/W Selects the EP0iTS interrupt output pin.
0 R/W Selects the SetupTS interrupt output pin.