Usage Notes; Break Detection And Processing (Asynchronous Mode Only); Mark State And Break Detection (Asynchronous Mode Only); Table 13.10 Sci Interrupt Sources - Hitachi H8S/2215 Series Hardware Manual

Table 13.10 SCI Interrupt Sources

Channel Name Interrupt Source
0 ERI0 Receive Error
RXI0 Receive Data Full
TXI0 Transmit Data Empty TDRE
TEI0 Transmission End
1 ERI1 Receive Error
RXI1 Receive Data Full
TXI1 Transmit Data Empty TDRE
TEI1 Transmission End
2 ERI2 Receive Error
RXI2 Receive Data Full
TXI2 Transmit Data Empty TDRE
TEI2 Transmission End
Note: * This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
13.9

Usage Notes

13.9.1

Break Detection and Processing (Asynchronous Mode Only)

When framing error detection is performed, a break can be detected by reading the RxD pin value
directly. In a break, the input from the RxD pin becomes all 0s, setting the FER flag, and possibly
the PER flag. Note that as the SCI continues the receive operation after receiving a break, even if
the FER flag is cleared to 0, it will be set to 1 again.
13.9.2

Mark State and Break Detection (Asynchronous Mode Only)

When TE is 0, the TxD pin is used as an I/O port whose direction (input or output) and level are
determined by DR and DDR. This can be used to set the TxD pin to mark state (high level) or send
a break during serial data transmission. To maintain the communication line at mark state until TE
is set to 1, set both DDR and DR to 1. As TE is cleared to 0 at this point, the TxD pin becomes an
I/O port, and 1 is output from the TxD pin. To send a break during serial transmission, first set
PCR to 1 and PDR to 0, and then clear TE to 0. When TE is cleared to 0, the transmitter is
initialized regardless of the current transmission state, the TxD pin becomes an I/O port, and 0 is
output from the TxD pin.
DTC
Interrupt Flag Activation
ORER, FER, PER Not possible Not possible High
RDRF Possible
Possible
TEND Not possible Not possible
ORER, FER, PER Not possible Not possible
RDRF Possible
Possible
TEND Not possible Not possible
ORER, FER, PER Not possible Not possible
RDRF Possible
Possible
TEND Not possible Not possible Low
DMAC
Activation
Possible
Possible
Possible
Possible
Not possible
Not possible
Rev. 3.0, 10/02, page 409 of 686
Priority*