Input/Output Pins; Register Descriptions; Table 19.2 Pin Configuration - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
Table of Contents

Advertisement

19.4

Input/Output Pins

The flash memory is controlled by means of the pins shown in table 19.2.

Table 19.2 Pin Configuration

Pin Name
I/O
RES
Input
FWE
Input
MD2,MD1,MD0
Input
PF3,PF0,P16,
Input
P14
TxD2
Output
RxD2
Input
USB+,USB-
Input/Output
VBUS
Input
UBPM
Input
USPND
Output
P36
Output
19.5

Register Descriptions

The flash memory has the following registers. For details on register addresses and register states
during each processing, refer to section 23, List of Registers.
• Flash memory control register 1 (FLMCR1)
• Flash memory control register 2 (FLMCR2)
• Erase block register 1 (EBR1)
• Erase block register 2 (EBR2)
• RAM emulation register (RAMER)
• Serial control register X ( SCRX)
Rev. 3.0, 10/02, page 564 of 686
Function
Reset
Flash program/erase protection by hardware
Sets this LSI's operating mode
Sets this LSI's operating mode in
programmer mode
Serial transmit data output
Serial receive data input
USB data output
USB cable connection/disconnection detection
USB bus power mode/self power mode setting
USB suspend output
D+ pull-up control
HD64F2215
and
HD64F2215U
HD64F2215
HD64F2215U

Advertisement

Table of Contents
loading

Table of Contents