Table 9.66 Pf4 Pin Function; Table 9.67 Pf3 Pin Function; Table 9.68 Pf2 Pin Function; Table 9.69 Pf1 Pin Function - Hitachi H8S/2215 Series Hardware Manual

Table 9.66 PF4 Pin Function

Operating Mode
PF4DDR
Pin function

Table 9.67 PF3 Pin Function

Operating Mode
Bus Mode
PF3DDR
Pin function
Notes: *1 ADTRG input when TRGS0=TRGS1=1.
*2 When used as an external interrupt input pin, do not use as an I/O pin for another
function.

Table 9.68 PF2 Pin Function

Operating Mode
WAITE
PF2DDR
Pin function

Table 9.69 PF1 Pin Function

Operating Mode
BRLE
PF1DDR
Pin function
Rev. 3.0, 10/02, page 258 of 686
Modes 4 to 6
−
HWA output
Modes 4 to 6
16 bits
−
0
LWR output
PF3 input
Modes 4 to 6
0
0 1
PF2 input PF2 output
Modes 4 to 6
0
0 1
PF1 input PF1 output
Mode 7
0
PF4 input
8 bits
1
PF3 output PF3 input
ADTRG input *
IRQ3 input *
1
−
WAIT input
PF2 input
1
−
BACK input
PF1 input
1
PF4 output
Mode 7
−
0 1
PF3 output
1
2
Mode 7
−
0 1
PF2 output
Mode 7
−
0 1
PF1 output