Hitachi H8S/2215 Series Hardware Manual page 48

Figure 11.2 Example of Pulse Output ......................................................................................... 334
Figure 11.3 Count Timing for Internal Clock Input.................................................................... 335
Figure 11.4 Count Timing for External Clock Input................................................................... 335
Figure 11.5 Timing of CMF Setting ........................................................................................... 336
Figure 11.6 Timing of Timer Output .......................................................................................... 336
Figure 11.7 Timing of Compare Match Clear............................................................................. 337
Figure 11.8 Timing of Clearance by External Reset................................................................... 337
Figure 11.9 Timing of OVF Setting............................................................................................ 338
Figure 11.10 Contention between TCNT Write and Clear ........................................................... 341
Figure 11.11 Contention between TCNT Write and Increment.................................................... 342
Figure 11.12 Contention between TCOR Write and Compare Match .......................................... 343
Section 12 Watchdog Timer
Figure 12.1 Block Diagram of WDT .......................................................................................... 347
Figure 12.2 Operation in Watchdog Timer Mode....................................................................... 351
Figure 12.3 Timing of WOVF Setting ........................................................................................ 352
Figure 12.4 Operation in Interval Timer Mode........................................................................... 353
Figure 12.5 Timing of OVF Setting............................................................................................ 353
Figure 12.6 Format of Data Written to TCNT and TCSR .......................................................... 354
Figure 12.7 Format of Data Written to RSTCSR (Example of WDT0)...................................... 355
Figure 12.8 Contention between TCNT Write and Increment.................................................... 356
Section 13 Serial Communication Interface
Figure 13.1 Block Diagram of SCI_0 ......................................................................................... 359
Figure 13.2 Block Diagram of SCI_1 and SCI_2 ....................................................................... 360
Figure 13.3 Examples of Base Clock when Average Transfer Rate is Selected ......................... 373
Figure 13.4 Example of Average Transfer Rate Setting with TPU Clock Input......................... 374
Figure 13.5 Data Format in Asynchronous Communication
(Example with 8-Bit Data, Parity, Two Stop Bits) .................................................. 381
Figure 13.6 Receive Data Sampling Timing in Asynchronous Mode......................................... 383
Figure 13.7 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode) ............................................................................................. 384
Figure 13.8 Sample SCI Initialization Flowchart........................................................................ 385
Figure 13.9 Example of Operation in Transmission in Asynchronous Mode
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 386
Figure 13.10 Sample Serial Transmission Flowchart.................................................................. 387
Figure 13.11 Example of SCI Operation in Reception
(Example with 8-Bit Data, Parity, One Stop Bit)................................................... 388
Figure 13.12 Sample Serial Reception Data Flowchart (1)......................................................... 390
Figure 13.12 Sample Serial Reception Data Flowchart (2)......................................................... 391
Figure 13.13 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)........................................... 392
Figure 13.14 Sample Multiprocessor Serial Transmission Flowchart......................................... 393
Rev. 3.0, 10/02, page xlviii of lviii