Dma Band Control Register (Dmabcr) - Hitachi H8S/2215 Series Hardware Manual

7.3.5

DMA Band Control Register (DMABCR)

DMABCR controls the operation of each DMAC channel.
• Short Address Mode
Bit Bit Name Initial Value R/W
15 FAE1 0
14 FAE0 0
 
13
 
12
Description
R/W Full Address Enable 1:
Specifies whether channel 1 is to be used in short address
mode or full address mode.
0: Short address mode
1: Full address mode
R/W Full Address Enable 0:
Specifies whether channel 0 is to be used in short address
mode or full address mode.
0: Short address mode
1: Full address mode
In short address mode, channels 0A and 0B are used as
independent channels.
R/W Reserved
This bit is invalid in full address mode.
R/W Reserved
This bit is invalid in full address mode.
Rev. 3.0, 10/02, page 153 of 686