Figure 15.22 Forcible Stall By Firmware - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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(1) Transition from normal operation to stall
(1-1)
(1-2)
Transaction request
(1-3)
STALL handshake
(1-4)
STALL handshake
(2) When Clear Feature is sent after EPnSTL is cleared
(2-1)
Transaction request
(2-2)
STALL handshake
(2-3)
Clear Feature command
(3) When Clear Feature is sent before EPnSTL is cleared to 0
(3-1)
Clear Feature command
Rev. 3.0, 10/02, page 510 of 686
USB function module
USB
Internal status bit
0
Internal status bit
0
To (1-3) or (1-4)
Internal status bit
0 → 1
To (2-1) or (3-1)
Internal status bit
0 → 1
To 2 in (2-1)
Internal status bit
1
Internal status bit
1
Internal status bit
1 → 0
Normal status restored
Internal status bit
1 → 0

Figure 15.22 Forcible Stall by Firmware

EPnSTL
0 → 1
Reference
EPnSTL
1
Stall
EPnSTL
1 (SCME = 0)
Stall
EPnSTL
1 → 0 (SCME = 1)
EPnSTL
1 → 0
EPnSTL
0
EPnSTL
0
EPnSTL
1
To (1-2)
1. Set EPnSTL to 1 by
firmware
1. Receive IN/OUT
token from the host
2. Refer to EPnSTL
1. SCME is set to 1
2. EPnSTL is set to 1
3. Set internal status
bit to 1
4. Transmit STALL
handshake
1. SCME is set to 1
2. EPnSTL is automatically
cleared to 0
3. Set internal status bit to 1
4. Transmit STALL
handshake
1. Clear EPnSTL to 0
by firmware
2. Receive IN/OUT
token from the host
3. Internal status bit
has been set to 1
4. EPnSTL not
referenced
5. No change in
internal status bit
1. Transmit STALL
handshake
1. Clear internal status
bit to 0
1. Clear internal status
bit to 0
2. No change in
EPnSTL bit

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