Figure 10.43 Timing For Status Flag Clearing By Dtc Or Dmac Activation - Hitachi H8S/2215 Series Hardware Manual

DTC DTC
read cycle write cycle
T1 T2 T1 T2
φ
Destination
Source address
Address
address
Status flag
Interrupt
request
signal

Figure 10.43 Timing for Status Flag Clearing by DTC or DMAC Activation

Rev. 3.0, 10/02, page 319 of 686