Usage Note - Hitachi H8S/2215 Series Hardware Manual

Item
Common Wait time after SWE1 bit setting*
Wait time after SWE1 bit clear*
Erase Wait time after ESU1 bit setting*
Wait time after E1 bit setting*
Wait time after E1 bit clear*
Wait time after ESU1 bit clear*
Wait time after EV1 bit setting*
Wait time after H'FF dummy write*
Wait time after EV1 bit clear*
Maximum erase count*
Notes: *1 Make each time setting in accordance with the program/program-verify flowchart or
erase/erase-verify flowchart.
*2 Programming time per 128 bytes (Shows the total period for which the P-bit in the flash
memory control register(FLMCR1) is set. It does not include the programming
verification time.)
*3 Block erase time (Shows the total period for which the E1-bit FLMCR1 is set. It does not
include the erase verification time.)
*4 Maximum programming time value
t (max) = Wait time after P1 bit set (z) x maximum programming count (N1 +N2)
p
*5 Maximum erasure time value
t (max) = Wait time after E1 bit set (z) x maximum erasure count (N)
E
*6 Minimum number of times for which all characteristics are guaranteed after rewriting.
(Guarantee range is 1 to minimum value.)
*7 Reference value for 25°C (as a guideline, rewriting should normally function up to this
value).
*8 Data retention characteristic when rewriting is performed within the specification range,
including the minimum value.
24.9

Usage Note

General Notice during Design for Printed Circuit Board: Measures for radiation noise caused
by the transient current in this LSI should be taken into consideration. The examples of the
measures are shown below.
•
To use a multilayer printed circuit board which includes layers for Vcc and GND.
• To mount by-pass capacitors (approximately 0.1 µF) between the Vcc and GND (Vss) pins of
this LSI.
1
1
1
1 5
*
1
1
1
1
1
1 5
*
= (Z0 + Z2) x 6 +Z1 x 994
Symbol Min Typ
x 1 1
θ
100 100
y 100 100
z 10 10
α
10 10
β
10 10
γ
20 20
ε
2 2
η
4 4
N — —
Rev. 3.0, 10/02, page 673 of 686
Max Unit
—
—
— µs
100 ms
— µs
— µs
— µs
— µs
— µs
100 Times