Table Of Contents - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
Table of Contents

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Section 1 Overview............................................................................................1
1.1
Overview........................................................................................................................... 1
1.2
Internal Block Diagram..................................................................................................... 2
1.3
Pin Arrangement ............................................................................................................... 3
1.4
Pin Functions in Each Operating Mode ............................................................................ 5
1.5
Pin Functions .................................................................................................................... 10
Section 2 CPU....................................................................................................19
2.1
Features............................................................................................................................. 19
2.1.1
Differences between H8S/2600 CPU and H8S/2000 CPU .................................. 20
2.1.2
Differences from H8/300 CPU ............................................................................ 21
2.1.3
Differences from H8/300H CPU.......................................................................... 21
2.2
CPU Operating Modes ...................................................................................................... 22
2.2.1
Normal Mode....................................................................................................... 22
2.2.2
Advanced Mode................................................................................................... 23
2.3
Address Space................................................................................................................... 26
2.4
Register Configuration...................................................................................................... 27
2.4.1
General Registers ................................................................................................. 28
2.4.2
Program Counter (PC) ......................................................................................... 29
2.4.3
Extended Control Register (EXR) ....................................................................... 29
2.4.4
Condition-Code Register (CCR) .......................................................................... 30
2.4.5
Initial Register Values.......................................................................................... 32
2.5
Data Formats..................................................................................................................... 32
2.5.1
General Register Data Formats ............................................................................ 32
2.5.2
Memory Data Formats ......................................................................................... 34
2.6
Instruction Set ................................................................................................................... 35
2.6.1
Table of Instructions Classified by Function ....................................................... 36
2.6.2
Basic Instruction Formats .................................................................................... 45
2.7
Addressing Modes and Effective Address Calculation ..................................................... 46
2.7.1
Register Direct-Rn............................................................................................. 47
2.7.2
Register Indirect-@ERn .................................................................................... 47
2.7.3
2.7.4
2.7.5
Absolute Address-@aa:8, @aa:16, @aa:24, or @aa:32.................................... 47
2.7.6
Immediate-#xx:8, #xx:16, or #xx:32 ................................................................. 48
2.7.7
Program-Counter Relative-@(d:8, PC) or @(d:16, PC).................................... 48
2.7.8
Memory Indirect-@@aa:8 ................................................................................ 48
2.7.9
Effective Address Calculation ............................................................................. 49
2.8
Processing States............................................................................................................... 52
Contents
Rev. 3.0, 10/02, page xxix of lviii

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