Hitachi H8S/2215 Series Hardware Manual page 407

Bit Bit Name
7 OVF
6 WT/IT
5 TME
4 —
3 —
2 CKS2
1 CKS1
0 CKS0
Note: * The write value should always be 0 to clear this flag.
Initial Value R/W
0 R/(W)*
0 R/W
0 R/W
1 —
1 —
0 R/W
0 R/W
0 R/W
Description
Overflow Flag
Indicates that TCNT has overflowed. Only a write of
0 is permitted, to clear the flag.
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected
in watchdog timer mode, OVF is cleared
automatically by the internal reset.
[Clearing conditions]
Cleared by reading TCSR when OVF = 1, then
writing 0 to OVF
Timer Mode Select
Selects whether the WDT is used as a watchdog
timer or interval timer.
0: Interval timer mode
1: Watchdog timer mode
Timer Enable
When this bit is set to 1, TCNT starts counting.
When this bit is cleared, TCNT stops counting and
is initialized to H'00.
Reserved
These bits are always read as 1 and cannot be
modified.
Clock Select 0 to 2
Selects the clock source to be input to TCNT. The
overflow frequency for ø = 10 MHz is enclosed in
parentheses.
000: Clock ø/2 (frequency: 32.0 µs)
001: Clock ø/64 (frequency: 1.0 µs)
010: Clock ø/128 (frequency: 2.0 ms)
011: Clock ø/512 (frequency: 8.3 ms)
100: Clock ø/2048 (frequency: 32.8 ms)
101: Clock ø/8192 (frequency: 131.1 ms)
110: Clock ø/32768 (frequency: 524.3 ms)
111: Clock ø/131072 (frequency: 2.1 s)
Rev. 3.0, 10/02, page 349 of 686