Figure 7.4 Example Of Sequential Mode Setting Procedure - Hitachi H8S/2215 Series Hardware Manual

Sequential mode
Set DMABCRH
Set transfer source
and transfer destination
Set number of transfers
Set DMACR
Read DMABCRL
Set DMABCRL
Sequential mode

Figure 7.4 Example of Sequential Mode Setting Procedure

Rev. 3.0, 10/02, page 166 of 686
[1] Set each bit in DMABCRH.
setting
[1]
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[2]
addresses
[3]
[4]
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
[5]
[6]
· Clear the FAE bit to 0 to select short address
mode.
· Specify enabling or disabling of internal interrupt
clearing with the DTA bit.
destination address in MAR and IOAR.
· Set the transfer data size with the DTSZ bit.
· Specify whether MAR is to be incremented or
decremented with the DTID bit.
· Clear the RPE bit to 0 to select sequential mode.
· Specify the transfer direction with the DTDIR bit.
· Select the activation source with bits DTF3 to
DTF0.
· Specify enabling or disabling of transfer
andinterrupts with the DTIE bit.
· Set the DTE bit to 1 to enable transfer.