Interrupts; Interrupt Source And Priority; Table 10.24 Tpu Interrupts - Hitachi H8S/2215 Series Hardware Manual

10.6

Interrupts

10.6.1

Interrupt Source and Priority

There are three kinds of TPU interrupt source: TGR input capture/compare match, TCNT
overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disabled
bit, allowing generation of interrupt request signals to be enabled or disabled individually. When
an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the
corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The
interrupt request is cleared by clearing the status flag to 0. Relative channel priorities can be
changed by the interrupt controller, but the priority order within a channel is fixed. For details, see
section 5, Interrupt Controller. Table 10.24 lists the TPU interrupt sources.
Table 10.24 TPU Interrupts
Channel Name
0 TGI0A
TGI0B
TGI0C
TGI0D
TCI0V
1 TGI1A
TGI1B
TCI1V
TCI1U
2 TGI2A
TGI2B
TCI2V
TCI2U
Note: * This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
Interrupt Source
TGRA_0 input
capture/compare match
TGRB_0 input
capture/compare match
TGRC_0 input
capture/compare match
TGRD_0 input
capture/compare match
TCNT_0 overflow
TGRA_1 input
capture/compare match
TGRB_1 input
capture/compare match
TCNT_1 overflow
TCNT_1 underflow
TGRA_2 input
capture/compare match
TGRB_2 input
capture/compare match
TCNT_2 overflow
TCNT_2 underflow
Interrupt DTC
Flag Activation
TGFA Possible
TGFB Possible
TGFC Possible
TGFD Possible
TCFV Not possible Not possible
TGFA Possible
TGFB Possible
TCFV Not possible Not possible
TCFU Not possible Not possible
TGFA Possible
TGFB Possible
TCFV Not possible Not possible
TCFU Not possible Not possible Low
Rev. 3.0, 10/02, page 311 of 686
DMAC
Activation
Priority*
Possible High
Not possible
Not possible
Not possible
Possible
Not possible
Possible
Not possible