Table 9.72 PG3 Pin Function
Operating Mode
PG3DDR
Pin function
Table 9.73 PG2 Pin Function
Operating Mode
PG2DDR
Pin function
Table 9.74 PG1 Pin Function
Operating Mode
PG1DDR
Pin function
Note: * When used as an external interrupt input pin, do not use as an I/O pin for another function.
Table 9.75 PG0 Pin Function
PG0DDR
Pin function
Modes 4 to 6
0
CS1 output
PG3 input
Modes 4 to 6
0
CS2 output
PG2 input
Modes 4 to 6
0
CS3 output
PG1 input
0
PG0 input
1
0
PG3 input
1
0
PG2 input
Mode 7
1
0
PG1 input
IRQ7 input*
Rev. 3.0, 10/02, page 261 of 686
Mode 7
1
PG3 output
Mode 7
1
PG2 output
1
PG1output
1
PG0 output