Figure 10.39 Tgi Interrupt Timing (Input Capture); Figure 10.40 Tciv Interrupt Setting Timing - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
Table of Contents

Advertisement

φ
Input capture
signal
TCNT
TGR
TGF flag
TGI interrupt
TCFV Flag/TCFU Flag Setting Timing: Figure 10.40 shows the timing for setting of the TCFV
flag in TSR by overflow occurrence, and TCIV interrupt request signal timing. Figure 10.41 shows
the timing for setting of the TCFU flag in TSR by underflow occurrence, and TCIU interrupt
request signal timing.
φ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
TCIV interrupt
N

Figure 10.39 TGI Interrupt Timing (Input Capture)

H'FFFF

Figure 10.40 TCIV Interrupt Setting Timing

N
H'0000
Rev. 3.0, 10/02, page 317 of 686

Advertisement

Table of Contents
loading

Table of Contents