Section 14 Boundary Scan Function; Features - Hitachi H8S/2215 Series Hardware Manual

Section 14 Boundary Scan Function

This LSI incorporates a boundary scan function, which is a serial I/O interface based on the JTAG
(Joint Test Action Group, IEEEStd.1149.1 and IEEE Standard Test Access Port and Boundary
Scan Architecture). Figure 14.1 shows the block diagram of the boundary scan function.
14.1

Features

• Five test signals
 TCK, TDI, TDO, TMS, TRST
• Six test modes supported
 BYAPASS, SAMPLE/PRELOAD, EXTEST, CLAMP, HIGHZ, IDCODE
• Boundary scan function cannot be performed on the following pins.
 Power supply pins: VCC, VSS, Vref, AVCC, AVSS, PLLVCC, PLLVSS, PLLCAP,
DrVCC, DrVSS
 Clock signals:
 Analog signals:
 Boundary scan signals: TCK, TDI, TDO, TMS, TRST
IFJTAG0A_000020020100
EXTAL, XTAL, EXTAL48, XTAL48
P40 to P43, P96, P97, USD+, USD-
Rev. 3.0, 10/02, page 417 of 686