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15.5.11 Stall Operations ....................................................................................................508
15.6 DMA Transfer Specifications............................................................................................513
15.6.1 Overview ..............................................................................................................513
15.6.2 On-Chip DMAC Settings .....................................................................................513
15.6.3 EP2i and EP4i DMA Transfer..............................................................................513
15.6.4 EP2o and EP4o DMA Transfer ............................................................................513
15.6.5 EP2iPKTE, EP4iPKTE, EP2oRDFN and EP4oRDFN Bits of UTRG.................514
15.7 Endpoint Configuration Example......................................................................................516
15.8 USB External Circuit Example .........................................................................................521
15.9 Usage Notes.......................................................................................................................525
15.9.1 Operating Frequency ............................................................................................525
15.9.2 Bus Interface ........................................................................................................525
15.9.3 Setup Data Reception ...........................................................................................525
15.9.4 FIFO Clear ...........................................................................................................525
15.9.5 IRQ6 Interrupt......................................................................................................525
15.9.6 Data Register Overread or Overwrite...................................................................526
15.9.7 EP3o Isochronous Transfer ..................................................................................527
15.9.8 Reset.....................................................................................................................529
15.9.9 EP0 Interrupt Assignment ....................................................................................529
15.9.10 Level Shifter for VBUS and IRQx Pins ...............................................................529
15.9.11 USB Endpoint Data Read and Write ....................................................................529
15.9.12 Restrictions for Software Standby Mode Transition ............................................530
15.9.13 USB External Circuit Example ............................................................................532
Section 16 A/D Converter..................................................................................533
16.1 Features .............................................................................................................................533
16.2 Input/Output Pins ..............................................................................................................535
16.3 Register Descriptions ........................................................................................................535
16.3.1 A/D Data Registers A to D (ADDRA to ADDRD)..............................................535
16.3.2 A/D Control/Status Register (ADCSR)................................................................536
16.3.3 A/D Control Register (ADCR).............................................................................538
16.4 Interface to Bus Master .....................................................................................................539
16.5 Operation...........................................................................................................................540
16.5.1 Single Mode .........................................................................................................540
16.5.2 Scan Mode............................................................................................................541
16.5.3 Input Sampling and A/D Conversion Time..........................................................542
16.5.4 External Trigger Input Timing .............................................................................544
16.6 Interrupts ...........................................................................................................................544
16.7 A/D Conversion Precision Definitions ..............................................................................545
16.8 Usage Notes.......................................................................................................................547
16.8.1 Permissible Signal Source Impedance..................................................................547
16.8.2 Influences on Absolute Precision .........................................................................547
16.8.3 Range of Analog Power Supply and Other Pin Settings ......................................547
Rev. 3.0, 10/02, page xl of lviii
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