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Table 15.3 Relationship between the UTSTR0 Setting and Pin Outputs
Pin
Input
Register Setting
UCTLR/
FADSEL PTSTE SUSPEND OE
VBUS
0
X
0
0
0
1
0
1
1
0
1
1
0
1
1
1
X
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
Legend
X:
Don't care.
0/1:
Register setting equals pin output
—:
Cannot be controlled. Indicates state in normal operation according to the USB operation
and port settings.
Rev. 3.0, 10/02, page 478 of 686
OE
OE
OE
FSE0 VPO
X
X
X
X
0/1
X
X
X
0/1
X
X
X
X
X
0/1
X
X
X
X
0/1
X
X
X
X
0
0
0
0
0
0
0
1
0
0
1
X
0
1
X
X
1
0
0
0
1
0
0
1
1
0
1
X
1
1
X
X
0/1
X
X
X
X
0/1
X
X
X
X
0/1
X
X
X
X
0/1
Pin Outputs
PA3/
USD+ USD-
USPND
SUSPND
Hi-Z
Hi-Z
0/1
Hi-Z
Hi-Z
0/1
1
Hi-Z
Hi-Z
1
Hi-Z
Hi-Z
1
0
1
0
1
0
0
0
0
0
Hi-Z
Hi-Z
0
0
1
1
1
0
1
0
0
1
Hi-Z
Hi-Z
1
Hi-Z
Hi-Z
0/1
0/1
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
P17/
P15/
P13/
OE
FSE0
VPO
1
1
0/1
1
0/1
0/1
0/1
0/1
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