A interrupts. External requests can be set for channel B only. When the DMAC is used in single
address mode, only channel B can be set. Figure 7.6 shows an example of the setting procedure for
idle mode.
Idle mode setting
Set DMABCRH
Set transfer source
and transfer destination
Set number of transfers
Set DMACR
Read DMABCRL
Set DMABCRL
7.4.4
Repeat Mode
Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit to
0. In repeat mode, MAR is updated after each byte or word transfer in response to a single transfer
request, and this is executed the number of times specified in ETCR. On completion of the
specified number of transfers, MAR and ETCRL are automatically restored to their original
settings and operation continues. One address is specified by MAR, and the other by IOAR. The
transfer direction can be specified by the DTDIR bit in DMACR. Table 7.5 summarizes register
functions in repeat mode.
Rev. 3.0, 10/02, page 168 of 686
[1] Set ech bit in DMABCRH.
[1]
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[2]
[4] Set each bit in DMACR.
addresses
[3]
[4]
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
[5]
[6]
Idle mode
Figure 7.6 Example of Idle Mode Setting Procedure
· Clear the FAE bit to 0 to select short address
mode.
· Specify enabling or disabling of internal interrupt
clearing with the DTA bit.
destinatiln address in MAR and IOAR.
· Set the transfer data size with the DTSZ bit.
· Specify whether MAR is to be incremented or
decremented with the DTID bit.
· Set the RPE bit to 1.
· Specify the transfer direction with the DTDIR bit.
· Select the activation source with bits DTF3 to
DTF0.
· Set the DTIE bit to 1.
· Set the DTE bit to 1 to enable transfer.