Operation In Asynchronous Mode; Data Transfer Format; Figure 13.5 Data Format In Asynchronous Communication (Example With 8-Bit Data, Parity, Two Stop Bits) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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13.4

Operation in Asynchronous Mode

Figure 13.5 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by data (in LSB-first order), a parity bit (high or low level), and
finally stop bits (high level). In asynchronous serial communication, the transmission line is
usually held in the mark state (high level). The SCI monitors the transmission line. When the
transmission line goes to the space state (low level), the SCI recognizes a start bit and starts serial
communication. Inside the SCI, the transmitter and receiver are independent units, enabling full-
duplex. Both the transmitter and the receiver also have a double-buffered structure, so data can be
read from or written during transmission or reception, enabling continuous data transfer.
1
LSB
Serial
0
data
Start
bit
1 bit
Figure 13.5 Data Format in Asynchronous Communication
13.4.1

Data Transfer Format

Table 13.8 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 13.5, Multiprocessor Communication Function.
D0
D1
D2
D3
Transmit/receive data
7 or 8 bits
One unit of transfer data (character or frame)
(Example with 8-Bit Data, Parity, Two Stop Bits)
MSB
D4
D5
D6
D7
Parity
bit
1 bit,
or none
Idle state
(mark state)
1
0/1
1
1
Stop bit
1 or
2 bits
Rev. 3.0, 10/02, page 381 of 686

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