Hitachi H8S/2215 Series Hardware Manual page 41

Hitachi single-chip microcomputer
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16.8.4 Notes on Board Design ........................................................................................ 548
16.8.5 Notes on Noise Countermeasures ........................................................................ 548
Section 17 D/A Converter..................................................................................551
17.1 Features............................................................................................................................. 551
17.2 Input/Output Pins .............................................................................................................. 552
17.3 Register Description.......................................................................................................... 552
17.3.1 D/A Data Register (DADR)................................................................................ 552
17.3.2 D/A Control Register (DACR) ............................................................................ 553
17.4 Operation .......................................................................................................................... 553
Section 18 RAM ................................................................................................555
Section 19 Flash Memory (F-ZTAT Version) ...................................................557
19.1 Features............................................................................................................................. 557
19.2 Mode Transitions .............................................................................................................. 559
19.3 Block Configuration.......................................................................................................... 563
19.4 Input/Output Pins .............................................................................................................. 564
19.5 Register Descriptions ........................................................................................................ 564
19.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 565
19.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 566
19.5.3 Erase Block Register 1 (EBR1) ........................................................................... 567
19.5.4 Erase Block Register 2 (EBR2) ........................................................................... 568
19.5.5 RAM Emulation Register (RAMER)................................................................... 569
19.5.6 Serial Control Register X (SCRX)....................................................................... 570
19.6 On-Board Programming Modes........................................................................................ 571
19.6.1 SCI Boot Mode(HD64F2215).............................................................................. 571
19.6.2 USB Boot Mode (HD64F2215U) ........................................................................ 575
19.6.3 Programming/Erasing in User Program Mode..................................................... 581
19.7 Flash Memory Emulation in RAM ................................................................................... 582
19.8 Flash Memory Programming/Erasing ............................................................................... 583
19.8.1 Program/Program-Verify ..................................................................................... 583
19.8.2 Erase/Erase-Verify............................................................................................... 585
19.9 Program/Erase Protection ................................................................................................. 587
19.9.1 Hardware Protection ............................................................................................ 587
19.9.2 Software Protection.............................................................................................. 587
19.9.3 Error Protection.................................................................................................... 587
19.10 Interrupt Handling when Programming/Erasing Flash Memory....................................... 588
19.11 Programmer Mode ............................................................................................................ 588
19.12 Power-Down States for Flash Memory............................................................................. 589
19.13 Flash Memory Programming and Erasing Precautions..................................................... 589
Rev. 3.0, 10/02, page xli of lviii

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