Hitachi H8S/2215 Series Hardware Manual page 424

Bit Bit Name Initial Value
3 MPIE 0
2 TEIE 0
1 CKE1 0
0 CKE0 0
Legend
X: Don't care
Rev. 3.0, 10/02, page 366 of 686
R/W Description
R/W Multiprocessor Interrupt Enable (enabled only when the
MP bit in SMR is 1 in asynchronous mode)
When this bit is set to 1, receive data in which the
multiprocessor bit is 0 is skipped, and setting of the
RDRF, FER, and ORER status flags in SSR is
prohibited. On receiving data in which the multiprocessor
bit is 1, this bit is automatically cleared and normal
reception is resumed. For details, refer to section 13.5,
Multiprocessor Communication Function.
When receive data including MPB = 0 is received,
receive data transfer from RSR to RDR, receive error
detection, and setting of the RDRF, FER, and ORER
flags in SSR , is not performed. When receive data
including MPB = 1 is received, the MPB bit in SSR is set
to 1, the MPIE bit is cleared to 0 automatically, and
generation of RXI and ERI interrupts (when the TIE and
RIE bits in SCR are set to 1) and FER and ORER flag
setting is enabled.
R/W Transmit End Interrupt Enable
This bit is set to 1, TEI interrupt request is enabled. TEI
cancellation can be performed by reading 1 from the
TDRE flag in SSR, then clearing it to 0 and clearing the
TEND flag to 0, or clearing the TEIE bit to 0.
R/W Clock Enable 0 and 1
R/W Selects the clock source and SCK pin function.
Asynchronous mode
00: Internal baud rate generator
SCK pin functions as I/O port
01: Internal baud rate generator
Outputs a clock of the same frequency as the bit
rate from the SCK pin.
1X: External clock
Inputs a clock with a frequency 16 times the bit
rate from the SCK pin.
Clocked synchronous mode
0X: Internal clock (SCK pin functions as clock output)
1X: External clock (SCK pin functions as clock input)