Internal Block Diagram; Figure 1.1 Internal Block Diagram - Hitachi H8S/2215 Series Hardware Manual

1.2

Internal Block Diagram

MD2
MD1
MD0
EXTAL
XTAL
PLLVCC
PLLCAP
PLLVSS
EXTAL48
XTAL48
NMI
FWE*
USPND
USD+
USD-
VBUS
PF7/
PF6/
PF5/
PF4/
PF3/ / /
PF2/
PF1/
PF0/ /
PG4/
PG3/
PG2/
PG1/ /
PG0
Note: * The FWE pin is only provided in the flash memory version.
Rev. 3.0, 10/02, page 2 of 686
Boundary
scan
PLL for H8S/2000 CPU
USB
Interrupts controller
USB
ROM
RAM
TPU (3 channels)
Port 1

Figure 1.1 Internal Block Diagram

Port D
DMAC
DTC
WDT
TMR (2 channels)
SCI0 (1 channnel, high speed UART)
SCI1, 2 (2 channels)
A/D converter (6 channels)
D/A converter (1 channel)
Port 4
Port 7
Port E
PA3/A19/SCK2/SUSPND
PA2/A18/RxD2
PA1/A17/TxD2
PA0/A16
PB7/A15
PB6/A14
PB5/A13
PB4/A12
PB3 / A11
PB2/A10
PB1/A9
PB0/A8
PC7/A7
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
P36
P35/SCK1/
P34/RxD1
P33/TxD1
P32/SCK0/
P31/RxD0
P30/TxD0
AVCC
Vref
AVSS
Port 9