Figure 6.11 Bus Timing For 8-Bit 3-State Access Space (Except Area 6) - Hitachi H8S/2215 Series Hardware Manual

Hitachi single-chip microcomputer
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8-Bit 3-State Access Space (Except Area 6): Figure 6.11 shows the bus timing for an 8-bit 3-
state access space. When an 8-bit access space is accessed, the upper half (D15 to D8) of the data
bus is used.
Wait states can be inserted.
Read
Write
Note: n = 0 to 5, 7

Figure 6.11 Bus Timing for 8-Bit 3-State Access Space (Except Area 6)

Rev. 3.0, 10/02, page 120 of 686
φ
Address bus
D15 to D8
D7 to D0
(16-bit bus
mode)
(8-bit bus
mode)
D15 to D8
D7 to D0
Bus cycle
T
T
1
2
High
High impedance
Valid
High impedance
T
3
Valid
Invalid

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