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USB on-the-go full-speed (OTG_FS)
43.15.39 OTG device V
(OTG_DVBUSDIS)
Address offset: 0x0828
Reset value: 0x0000 17D7
This register specifies the V
31
30
29
Res.
Res.
Res.
Res.
15
14
13
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 VBUSDT: Device V
43.15.40 OTG device V
(OTG_DVBUSPULSE)
Address offset: 0x082C
Reset value: 0x0000 05B8
This register specifies the V
31
30
29
Res.
Res.
Res.
Res.
15
14
13
rw
rw
rw
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 DVBUSP: Device V
1570/1693
discharge time register
BUS
BUS
28
27
26
25
Res.
Res.
Res.
12
11
10
9
rw
rw
rw
rw
discharge time
BUS
Specifies the V
discharge time after V
BUS
V
discharge time in PHY clocks / 1 024
BUS
Depending on your V
BUS
pulsing time register
BUS
BUS
28
27
26
25
Res.
Res.
Res.
12
11
10
9
rw
rw
rw
rw
pulsing time
BUS
Specifies the V
pulsing time during SRP. This value equals:
BUS
V
pulsing time in PHY clocks / 1 024
BUS
discharge time after V
24
23
22
Res.
Res.
Res.
8
7
6
VBUSDT
rw
rw
rw
pulsing during SRP. This value equals:
BUS
load, this value may need adjusting.
pulsing time during SRP.
24
23
22
Res.
Res.
Res.
8
7
6
DVBUSP
rw
rw
rw
DocID024597 Rev 3
pulsing during SRP.
BUS
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
rw
rw
rw
rw
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
rw
rw
rw
rw
RM0351
17
16
Res.
Res.
1
0
rw
rw
17
16
Res.
Res.
1
0
rw
rw
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