Clock Configuration; Clock Selection (Clockspeed) - Fujitsu FR Series Application Note

2.7 Clock Configuration

2.7.1 Clock Selection (CLOCKSPEED)

There are different default configurations available, where all necessary settings for clocks
and the related registers are made. These configurations should not be changed. The
default settings include the settings for the flash access and the regulator configuration, too.
Beside these configurations, there is the possibility to define a user configuration.
Available settings for CLOCKSPEED:
- NO_CLOCK
- SUB_32KHZ_CPU__32KHZ_PER_32KHZ_EXT_32KHZ_CAN__2MHZ means:
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- MAIN_4MHZ_CPU___2MHZ_PER__1MHZ_EXT__1MHZ_CAN__2MHZ means:
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_4MHZ__CPU__48MHZ_PER_16MHZ_EXT_24MHZ_CAN_16MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_4MHZ__CPU__64MHZ_PER_16MHZ_EXT_32MHZ_CAN_16MHZ means:
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_4MHZ__CPU__80MHZ_PER_20MHZ_EXT_27MHZ_CAN_20MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_4MHZ__CPU__80MHZ_PER_20MHZ_EXT_40MHZ_CAN_20MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
MCU-AN-300021-E-V10
Start91460.asm
Chapter 2 Settings of the Start91460.asm
clock registers are not set by the startup file.
= 32 kHz, PLL is not active
= 32 kHz
= 32 kHz
= 32 kHz
= 2 MHz, using main oszillation
= 4 MHz, PLL is not activated
= 2 MHZ
= 1 MHZ
= 1 MHZ
= 2 MHz, using main oszillation
= 4 MHz, PLL is activated
= 48 MHZ
= 16 MHZ
= 24 MHZ
= 16 MHz, using PLLx
= 4 MHz, PLL is activated
= 64 MHZ
= 16 MHZ
= 32 MHZ
= 16 MHz, using PLLx
= 4 MHz, PLL is activated
= 80 MHZ
= 20 MHZ
= 27 MHZ
= 20 MHz, using PLLx
= 4 MHz, PLL is activated
= 80 MHZ
= 20 MHZ
= 40 MHZ
= 20 MHz, using PLLx
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