ST STM32L4+ Series Reference Manual page 1891

RM0432
52.6.5 SPI CRC polynomial register (SPIx_CRCPR)
Address offset: 0x10
Reset value: 0x0007
15 14 13
rw rw rw
Bits 15:0 CRCPOLY[15:0]: CRC polynomial register
Note: The polynomial value should be odd only. No even value is supported.
52.6.6 SPI Rx CRC register (SPIx_RXCRCR)
Address offset: 0x14
Reset value: 0x0000
15 14 13
r r r
Bits 15:0 RXCRC[15:0]: Rx CRC register
52.6.7 SPI Tx CRC register (SPIx_TXCRCR)
Address offset: 0x18
Reset value: 0x0000
15 14 13
r r r
12 11 10 9
rw rw rw rw
This register contains the polynomial for the CRC calculation.
The CRC polynomial (0x0007) is the reset value of this register. Another polynomial can be
configured as required.
12 11 10 9
r r r r
When CRC calculation is enabled, the RXCRC[15:0] bits contain the computed CRC value of
the subsequently received bytes. This register is reset when the CRCEN bit in SPIx_CR1
register is written to 1. The CRC is calculated serially using the polynomial programmed in
the SPIx_CRCPR register.
Only the 8 LSB bits are considered when the CRC frame format is set to be 8-bit length
(CRCL bit in the SPIx_CR1 is cleared). CRC calculation is done based on any CRC8
standard.
The entire 16-bits of this register are considered when a 16-bit CRC frame format is selected
(CRCL bit in the SPIx_CR1 register is set). CRC calculation is done based on any CRC16
standard.
A read to this register when the BSY Flag is set could return an incorrect value.
12 11 10 9
r r r r
8 7 6
CRCPOLY[15:0]
rw rw rw
8 7 6
RXCRC[15:0]
r r r
8 7 6
TXCRC[15:0]
r r r
RM0432 Rev 6
Serial peripheral interface (SPI)
5 4 3 2
rw rw rw rw
5 4 3 2
r r r r
5 4 3 2
r r r r
1 0
rw rw
1 0
r r
1 0
r r
1891/2301
1893