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2.7
The CoreSight 10 connector pinouts and interface signals
This describes the CoreSight 10 connector.
This section contains the following subsections:
•
2.7.1 About the CoreSight 10 connector on page
•
2.7.2 CoreSight 10 pinouts on page
•
2.7.3 CoreSight 10 interface signals on page
2.7.1
About the CoreSight 10 connector
You can use the CoreSight 10 connector in either standard JTAG (IEEE 1149.1) mode or Serial Wire
Debug (SWD) mode.
The following figure shows the CoreSight 10 connector pinout:
A polarizing key is fitted only at the target end of the cable.
Related concepts
2.12 Series termination on page 2-52.
Related references
2.2 Target connectors supported by DSTREAM on page 2-28.
2.10 I/O diagrams for the DSTREAM probe connectors on page 2-49.
2.11 Voltage domains of the DSTREAM probe on page 2-51.
2.7.2 CoreSight 10 pinouts on page 2-40.
2.7.3 CoreSight 10 interface signals on page 2-41.
Related information
ETMv1 and ETMv3 architecture pinouts.
2.7.2
CoreSight 10 pinouts
The table shows the CoreSight 10 pinouts as used on the target board.
ARM 100956_0527_00_en
Note
Copyright © 2010–2012, 2015–2017 ARM Limited or its affiliates. All rights reserved.
2 ARM DSTREAM Target Interface Connections
2.7 The CoreSight 10 connector pinouts and interface signals
2-40.
2-40.
2-41.
Figure 2-9 CoreSight 10 connector pinout
Table 2-12 CoreSight 10 interface pinout table
Pin Signal name I/O diagram Voltage domain
1
VTREF
2
TMS/SWDIO B/C
3
GND
4
TCK/SWCLK B
Non-Confidential
1
3
5
7
9
G
A
A
H
NA
A
2
4
6
8
10
2-40
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