Bursting - Texas Instruments OMAP5912 Reference Manual

Table 102. DMA Data Packing
4.11

Bursting

Example 5. Packing 2 x s16 => 32
SPRU755B
Split a single word transfer into several byte accesses. This occurs when
-
DMA port size is less than the size of the element type. For example, when
the element size is programmed as 32 bits and the destination port is 16
bits wide, the transfer write operation is split into two 16-bit write
operations.
The value programmed for channel element size determines the width of the
read access at the source port and write access at the destination port. If the
element size is smaller than the source port width and source packing is
enabled, the source port controller receives 4 bytes per service-chain request.
This reduces overhead because four times as much data is written into the
channel FIFO per service-chain cycle. Similarly, if packing is enabled at the
destination port, 4 bytes are written per iteration of the destination port service
chain.
The DMA performs packing as shown in Table 102.
Data Type Port Bus Size
8-bit 16-bit
8-bit 32-bit
16-bit 32-bit
Bursting is an extension of the packing concept. A burst is defined as 16 bytes.
When bursting is enabled at the source port, 16 bytes of data at a time are read
into the channel FIFO before the source port controller advances to the next
position in the service chain. Likewise, when bursting is enabled at the
destination port, it accepts 16 bytes of data from the channel FIFO before the
service chain can advance to the next position.
Although packing and bursting can improve throughput of a particular channel,
they can affect latencies of other active DMA channels.
A channel is set up for a transfer with the following parameters for its
-
source:
Number of frames in the block: FN = 2
J
Number of elements per frame: EN = 5
J
Type of data is s16
J
Data Packing
Two data values packed into 16 bits
Four data values packed into 32 bits
Two data values packed into 32 bits
Direct Memory Access (DMA) Support
DSP DMA
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