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Break Condition
6.6.9
Programmable Baud Rate Generator
SPRU760B
For the timeout interrupt, the counter only counts when there is data in the RX
FIFO. The count is reset when there is activity on the RX line or when the RHR
is read.
When a break condition occurs, the TX line is pulled low. A break condition is
activated by setting LCR[6]. Be aware that the break condition is not aligned
on word stream, that is, a break condition can occur in the middle of a
character. The only way to send a break condition on a full character is:
Reset transmit FIFO (if enabled).
-
Wait for transmit shift register to become empty (LSR[6] = 1).
-
Take a guard time according to stop bit definition.
-
Set LCR[6] to 1.
-
Break condition is asserted as long as LCR[6] is set to 1.
The above functionality (time-out counter and break condition) applies only to
the UART modem operation and does not extend to the UART IrDA modes of
operation.
The UART/IrDA module contains a programmable baud generator and a set
of fixed dividers that take the 48-MHz clock input and divide it down to the
expected baud rate.
The baud rate generator and associated controls are depicted in Figure 76.
UARTs
Serial Interfaces
191
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