Mpu Gdma Handler Configuration - Texas Instruments OMAP5912 Reference Manual

Table 1. MPU GDMA Handler Mapping (Continued)
2.1.1

MPU GDMA Handler Configuration

Table 2. MPU GDMA Handler Control Registers
Name
FUNC_MUX_MPU_DMA_A
FUNC_MUX_MPU_DMA_B
FUNC_MUX_MPU_DMA_C
FUNC_MUX_MPU_DMA_D
FUNC_MUX_ARM_DMA_E
FUNC_MUX_ARM_DMA_F
FUNC_MUX_ARM_DMA_G
SPRU755B
MPU GDMA Handler Input Line
REQ62
REQ63
REQ64
The mapping of the system DMA requests is done through the GDMA registers
(shown in Table 2), which are implemented in the configuration module.
Table 3 through Table 9 describe the register bits.
The values programmed into these registers represent a zero-based
numbering of the DMA request. Thus, peripheral request number n is
programmed as n-1, not n.
Base Address = 0xFFFE 1000
Description
Controls mapping for system DMA requests 1 to 5.
Controls mapping for system DMA requests 6 to 10.
Controls mapping for system DMA requests 11 to 15.
Controls mapping for system DMA requests 16 to 20.
Controls mapping for system DMA requests 21 to 25.
Controls mapping for system DMA requests 26 to 30.
Controls mapping for system DMA request 31.
Peripheral Request
Unconnected
Unconnected
Unconnected
Direct Memory Access (DMA) Support
GDMA Handlers
R/W Offset
R/W 0xEC
R/W 0xF0
R/W 0xF4
R/W 0xF8
R/W 0xFC
R/W 0x100
R/W 0x104
17